December 1997, Volume 6, Number 4
This paper describes the design and hardware implementation of the Tesseral Processor (TP) with Programmable Logic Devices (PLD). The TP can be used for image processing based on hierarchical data structures as Linear QuadTree (LQT).
A simple adaptive antenna based on the pilot signal method is described in the presented paper. The system consists of coherent mixers, which shift RF signals into IF band, of sampling amplifiers and A/D converters, which digitalize signals, and of PC, which performs the adaptive control. Functionality of the system is verified by a simple experiment.
An adaptive image coding scheme, called multistage vector quantization (MSVQ) is proposed. A new algorithm of MSVQ uses clustering interpolation in DCT domain and enables vector quantization of large image blocks with tolerable encoding complexity. Their mean luminance values are efficiently removed by the spline interpolative vector quantizer using a small number of bits. It can achieve a very high compression rate for low detailed images without complicated classification of transform blocks and subvector construction.
In the paper we introduce and discuss an alphabet that has been proposed for phonemicly oriented automatic speech recognition. The alphabet, denoted as a PAC (Phonetic Alphabet for Czech) consists of 48 basic symbols that allow for distinguishing all major events occurring in spoken Czech language. The symbols can be used both for phonetic transcription of Czech texts as well as for labeling recorded speech signals. From practical reasons, the alphabet occurs in two versions; one utilizes Czech native characters and the other employs symbols similar to those used for English in the DARPA and NIST alphabets.
DC operating points of a linearized noninertial network can be, according to the character of their stability, classified into 3 categories: 1. stable, 2. unstable, 3. conditionally stable (conditionally unstable). In the paper it is shown that the process of decision can be based on modified node voltage formulation of network equations. The suggested process consists of formulation of the system matrix, matrix inversion and simple arithmetical manipulations with the elements of the resultant matrix.